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fedl9484-01 issue date: dec. 25, 2013 ML9484 static, 1/2 duty, 1/3 duty, 1/4 duty 50 outputs lcd driver 1/29 general description the ML9484 is an lcd driver lsi, consists of a 50-bit shift register, a 200-bit data latch, 50 sets of lcd drivers, and a common signal generation circuit. it can directly drive an lcd up to 50 segments for static display, 100 segments for 1/2-duty display, 150 segments for 1/3-duty display, and 200 segments for 1/4-duty display. features ? ? logic power supply voltage : 2.7 to 5.5 v ? lcd drive power supply voltage : 4.5 to 5.5 v ? maximum number of segments static display : 50 segments 1/2-duty display : 100 segments 1/3-duty display : 150 segments 1/4-duty display : 200 segments ? serially interfaces with the cpu using the three signal lines of data, clock, and load ? selectable internal cr oscillator circuit or external clock input ? built-in bias circuit ? built-in common output intermediate-value voltage generation circuit ? command-selectable a-waveform or b-waveform ? package : 64-pin plastic tqfp
fedl9484-01 ML9484 2/29 block diagram 50-dot segment driver latch selector load osc latch1 latch2 data clock 50-ch data selector common driver seg1 seg50 com1 50-bit shift register 50-bit 50-bit 50 com2 com3 com4 50 50 50 50 vlcd bias resi. vdd gnd osc i/e osc latch4 50-bit 50-bit latch3 command decoder generator timing resetb test
fedl9484-01 ML9484 3/29 pin configuration (top view) 48 47 46 45 44 43 42 41 40 39 38 1 2 3 4 5 6 7 8 9 10 11 seg1 seg2 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg48 seg47 seg46 seg45 seg44 seg43 seg42 seg41 seg40 seg39 seg38 64 63 62 61 60 59 58 57 56 55 54 data clock load resetb osc vs s tes t os ci /e vdd vlcd com1 17 18 19 20 21 22 23 24 25 26 27 seg17 seg18 seg19 seg20 seg21 seg22 seg23 seg24 seg25 seg26 seg27 12 seg12 13 seg13 14 seg14 15 seg15 16 seg16 28 seg28 29 seg29 30 seg30 31 seg3 1 32 seg3 2 37 seg37 36 seg36 35 seg35 34 seg34 33 seg33 53 com2 52 com3 51 com4 50 seg50 49 seg49 64-pin plastic tqfp
fedl9484-01 ML9484 4/29 absolute maximum ratings item symbol condition rating unit logic power supply voltage v dd ta = 25c -0.3 to 6.0 v lcd drive power supply voltage v lcd ta = 25c - 0.3 to 6.0 v input voltage v i ta = 25c ? 0.3 to v dd + 0.3 v output short-circuit current is ta = 25c - 2.0 to +2.0 ma power dissipation p d ta Q 105c 145 mw storage temperature t stg ? -55 to +150 c note: do not use the ML9484 by short-circuiting one output pin to another output pin as well as to other pin (input pin, input/output pin, or power supply pin). recommended operation conditions item symbol condition range unit logic power supply voltage v dd * ? 2.7 to 5.5 v lcd drive power supply voltage v lcd * ? 4.5 to 5.5 v osc in clock frequency f cp1 ? 0.5 to 10 khz data clock frequency f cp2 ? 0.01 to 1.0 mhz operating temperature t a ? -40 to +105 c note(*): use at v dd d v lcd .
fedl9484-01 ML9484 5/29 electrical characteristics dc characteristics (v dd = 2.7 to 5.5 v, v lcd = 4.5 to 5.5 v, ta= -40 to +105c) item symbol condition min. typ. max. unit applicable pin "h" input voltage v ih ? 0.8v dd ? v dd v (*1) "l" input voltage v il ? gnd ? 0.2v dd v (*1) input leakage current 1 i l1 v i = v dd or 0 v -1 ? 1 a (*2) input leakage current 2 i l2 v i = v dd -1 ? 1 a resetb pull-up current i pu v dd = 5.0v,v i = 0 v 30 ? 140 a resetb segment v ohs v lcd = 5v ? 5 15 k ? seg1 to seg50 driver on resistor common v ohc v lcd = 5v ? 5 12 k ? com 1 to com4 i dds ? 1 7 a vdd static supply current i lcds v dd =v lcd =5.5 v input pin fixed to "h" or "l" oscillation stopped, output no-load ? 9 15 a vlcd i dd1 ? 2 10 a vdd dynamic supply current 1 i lcd1 v dd =v lcd = 5.5 v (*3) clock osc external input f cp1 =1.8khz ? 9 15 a vlcd i dd2 ? 53 82 a vdd dynamic supply current 2 i lcd2 v dd =v lcd = 5.5 v (*4) internal oscillation=95hz ? 9 15 a vlcd (*1) : data, clock, load, resetb, osc, osc i/e (*2) : data, clock, load, osc, osc i/e (*3) : 1/4-duty, 1/3-bias, osci/e=?l?, output pin no-load. (*4) : 1/4-duty, 1/3-bias, osci/e=?h?, (f2, f, f0) = (0, 1, 1) 95 hz, output pin no-load.
fedl9484-01 ML9484 6/29 switching characteristics ? osc ti ming (v dd = 2.7 to 5.5 v, v lcd = 4.5 to 5.5 v, ta = -40 to +105c) item symbol condition min. typ. max. unit applicable pin osc in clock frequency (external input) f cp1 0.5 1.8 10 khz osc clock pulse width (external input) t wcp1 40 ? ? s osc clock rise and fall time (external input) t osc clock input from osc. osc i/e = "l" ? ? (*1) s osc internal clock frequency (internal oscillation) f osc1 osc open. (f2, f1, f0)=(0, 0, 1) osc i/e = "h" 18 28.8 44 khz osc the relation between osc in clock frequency and frame frequency is as the equation below. f frm = f cp1 /24 (*1) t osc is a reference value. the longer the clock rise and fall time, the more suscep tible to extraneous noises around the threshold value. make the rise as steep as possible. reference value: max=2 s. ? serial interface timing (v dd = 2.7 to 5.5 v, v lcd = 4.5 to 5.5 v, ta = -40 to +105c) item symbol condition min. typ. max. unit applicable pin data clock frequency f cp2 0.01 ? 1 mhz clock data clock pulse width t wcp2 100 ? ? ns clock data setup time t su 50 ? ? ns data data hold time t hd 50 ? ? ns clock clock-load timing t cl 100 ? ? ns clock load-clock timing t lc 100 ? ? ns load load pulse width t wld 100 ? ? ns load signal rise and fall time tsr,tsf ? ? (*2) ns ? clock,data, load (*2) tsr and tsf shall be reference values. the longer the clock rise and fall time, the more suscep tible to extraneous noises around the threshold value. make the rise as steep as possible. reference value: max=10ns.
fedl9484-01 ML9484 7/29 timing chart (osc) osc (external clock) 1/f cp1 t wcp1 t wcp1 v ih v ih v il v il v ih t osc timing chart (serial interface) v ih v il v ih v il data clock v ih v ih v il v il v il v il load v ih v ih v il v il t wcp2 t wcp2 t hd t su 1/f cp2 t cl t lc t wld v ih v il t sf v ih v il t sr v ih t sr v ih v il t sf t sf t sr
fedl9484-01 ML9484 8/29 power on/off timing to turn on the power supply, raise the logic power supply first, then lcd drive power supply in order to prevent the ic from malfunctioning. to fall the power supply, fall the lcd drive power supply first, then the logic power supply. for a vdd pin ranging from 0 v to vddmin, set vdd vlcd and t1 0 [ns]. initialization signal timing keep the resetb pin at "l" level until the vdd reaches vdd min. (t2 200[ns]) the value of the current of the pull-up resistor is specified for resetb pin. the customer needs to select an external capacitor that meets the timing requirements shown above. v dd v lcd time voltage t1 t1 vdd resetb vil t2 vdd min
fedl9484-01 ML9484 9/29 pin descriptions pad number symbol i/o description 1 to 50 seg1 to seg50 o outputs for lcd display. connected to the segment pins on the lcd panel. in the display off mode, all the outputs are fixed to gnd. 51 to 54 com1 to com4 o outputs for lcd display. connected to the common pins on the lcd panel. in the display off mode, all the outputs are fixed to gnd. 55 vlcd - power supply pin for lcd driver. 56 vdd - power supply pin for logic circuit. 57 osc i/e i this input selects whether to use the external clock input mode or to use the internal oscillation mode. it has a schmitt circuit. when this pin is "h", the mode is the internal rf oscillation mode. when this pin is "l", the mode is the external clock input mode. 58 test i ic test pin. has a pull-down resistor built-in. use it as it is connected to gnd. 59 gnd - ground pin. 60 osc i pin for oscillation. has a schmitt circuit built-in. internal rf oscillation mode: set the osci/e pin to "h", open the osc pin. external clock input mode: set the osci/e pin to "l", input the external clock to the osc pin. 61 resetb i reset signal input pin for initializing inside the ic. it has a schmitt circuit. the "l" level enables the reset. this pin has an internal pull-up resistor. the power-on reset operation is available by connecting an external capacitor. *1 62 load i input pin for the load signal of display data. it has a schmitt circuit. the display data in the shift register is transmitted as is to the segment driver for the "h" duration. when this pin is brought into "l", the shift register is disconnected from the segment driver. the display data in the shift register immediately before it become "l" is held in the data latch and transmitted to the segment driver. 63 clock i shift clock input pin for display data. it has a schmitt circuit. the display data input to the data pin is serially input to the shift register at the clock signal rise. 64 data i display data input pin. it has a schmitt circuit. input the display data in the order of seg50, seg49, ... , seg2, and seg1. the display data turns on at "h" and turns off at "l". *1: reset circuit configuration resetb vd d c rst
fedl9484-01 ML9484 10/29 description operation description ? display data input as described in the data configuration section, the displa y data consists of the data field that corresponds to each segment on/off and the command field that indicates the display data input. when inputting the display data, the "f1" command is set in the command field. when the "f2" to "f5" command is set in the command field, the display data in the data field becomes invalid. the data input to the data pin is loaded to the shift register at the clock pulse rise, transferred to the display data latch during the load pulse at the "h" level, then output via the segment driver. d1 d2 d3 d4 d48 d49 d50 c0 c1 c2 c3 c4 clock data new data load display output c5 data field old data command field ? display on, display off the display becomes off at power-on reset. to display, write the display on command. the display off is the command that makes all segments off. writing the display off command turns off the lights regardless of the display data. the display on is the command to release the display off. writing the display on command returns the display to the original state. d1 d2 c4 c2 c3 c4 c5 c2 c3 c4 c5 clock data load display on/off c5 resetb display data input write display on command write display off command
fedl9484-01 ML9484 11/29 ? list of commands command name c5 c4 c3 c2 c1 c0 operation f0 0 0 0 x x x disabled f1 0 0 1 co1 co0 x data write address setting (co1,co0)=(0, 0): corresponding to common 1 (co1,co0)=(0, 1): corresponding to common 2 (co1,co0)=(1, 0): corresponding to common 3 (co1,co0)=(1, 1): corresponding to common 4 f2 0 1 0 f2 (0) f1 (0) f0 (0) frame frequency setting (f2, f1, f0)=(0, 0, 0): 65hz (f2, f1, f0)=(0, 0, 1): 75hz (f2, f1, f0)=(0, 1, 0): 85hz (f2, f1, f0)=(0, 1, 1): 95hz (f2, f1, f0)=(1, 0, 0): 130hz (f2, f1, f0)=(1, 0, 1): 150hz (f2, f1, f0)=(1, 1, 0): 170hz (f2, f1, f0)=(1, 1, 1): 190hz (valid for internal cr oscillation) f3 0 1 1 bias (0) wsel (0) x lcd bias setting bias="0" : 1/3-bias bias="1" : 1/2-bias lcd driving waveform setting wsel="0" : a-waveform wsel="1" : b-waveform f4 1 0 0 d1 (0) d0 (0) x display duty setting (d1, d0)=(0, 0): static (com1=com2=com3=com4) (d1, d0)=(0, 1): 1/2-duty (com1=com3, com2=com4) (d1, d0)=(1, 0): 1/3-duty (com2=com4) (d1, d0)=(1, 1): 1/4-duty f5 1 0 1 dsp (0) x x display on/off setting dsp="0" : off b com=seg=gnd b dsp="1" : on f6 1 1 0 x x x disabled f7 1 1 1 x x x disabled x: don't care ( ): reset value
fedl9484-01 ML9484 12/29 data configuration [in put data] d50 d49 d48 d3 d2 d1 c0 c1 c2c3 c4 c5 command lcd display data corresponding to seg1 corresponding to seg50 first bit note 1 : the commands f4 settings become valid when the least four bits of c2 to c5 are input. (the bits from d1 to d50 and from c0 to c1 are not necessary.) the commands f3 and f4 settings become valid when the least five bits of c1 to c5 are input. (the bits from d1 to d50 and from c0 are not necessary.) the commands f2 settings become valid when th e least six bits of c0 to c5 are input. (the bits from d1 to d50 are not necessary.) note 2 : if the dummy bit is needed for the reason of number of transfer bits, put it on the first bit side. note 3 : the command execution follows the contents of the c5 to c0 registers immediately before the load becomes "h".
fedl9484-01 ML9484 13/29 lcd driving waveform ? static mode (same as a-waveform and b-waveform) on com1 off com1 com2 com3 com4 seg2 seg3 seg1 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 14/29 ? 1/2-duty, 1/2-bias mode (a-waveform) com1 on com2 off seg2 seg3 com1 com3 com2 com4 seg1 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 15/29 ? 1/2-duty, 1/3-bias mode (a-waveform) com1 on com2 off seg2 seg3 com1 com3 com2 com4 seg1 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 16/29 ? 1/3-duty, 1/2-bias mode (a-waveform) com1 on com2 off com3 seg com1 com2 com4 com3 seg1 seg2 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 17/29 ? 1/3-duty, 1/3-bias mode (a-waveform) com1 on com2 off com3 seg com1 com2 com4 com3 seg1 seg2 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 18/29 ? 1/4-duty, 1/2-bias mode (a-waveform) com1 com2 on com3 off com4 seg2 seg3 com4 com1 com2 com3 seg1 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 19/29 ? 1/4-duty, 1/3-bias mode (a-waveform) com1 com2 com3 off com4 seg2 seg3 com4 com1 com2 com3 seg1 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 20/29 ? 1/2-duty, 1/2-bias mode (b-waveform) com1 on com2 off seg2 seg3 com1 com3 com2 com4 seg1 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 21/29 ? 1/2-duty, 1/3-bias mode (b-waveform) com1 on com2 off seg2 seg3 com1 com3 com2 com4 seg1 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 22/29 ? 1/3-duty, 1/2-bias mode (b-waveform) com1 on com2 off com3 seg com1 com2 com4 com3 seg1 seg2 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 23/29 ? 1/3-duty, 1/3-bias mode (b-waveform) com1 on com2 off com3 seg com1 com2 com4 com3 seg1 seg2 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 24/29 ? 1/4-duty, 1/2-bias mode (b-waveform) com1 com2 on com3 off com4 seg2 seg3 com4 com1 com2 com3 seg1 s e g 1 s e g 2 s e g 3 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 v lcd gnd v lcd /2 ffrm
fedl9484-01 ML9484 25/29 ? 1/4-duty, 1/3-bias mode (b-waveform) com1 com2 com3 off com4 seg2 seg3 com4 com1 com2 com3 seg1 v lcd gnd 2v lcd /3 v lcd /3 s e g 1 s e g 2 s e g 3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 v lcd gnd 2v lcd /3 v lcd /3 ffrm
fedl9484-01 ML9484 26/29 example of application circuit com3 com4 com4 com3 vdd load data clock seg1 seg50 ML9484 +5 v osci/e gnd test resetb seg1 seg50 1/4 duty lcd panel cpu com1 com2 com2 com1 osc +5 v vlcd open refresh although the ML9484 holds operation state by commands, excessive external noise might change the internal state. on a chip-mounting and system level, it is necessary to take countermeasures against preventing noise from occurring. it is recommended to use the refresh sequence periodically to control sudden noise.
fedl9484-01 ML9484 27/29 package dimensions notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact rohm?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
fedl9484-01 ML9484 28/29 revision history page document no. issue date previous edition new edition description fedl9484-01 dec .25, 2013 ? ? final edition 1 issued
fedl9484-01 ML9484 29/29 notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of lapis semiconductor co., ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing lapis semiconductor's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from lapis semiconductor upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the info rmation specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, lapis semiconductor shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. lapis semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by lapis semiconductor and other parties. lapis semiconductor shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while lapis semiconductor always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. lapis semiconductor shall bear no responsibility whatsoever for your use of any product outside of the pr escribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transpor tation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). lapis semiconductor shall bear no responsibility in any way for use of any of the pr oducts for the above special purposes. if a product is intended to be used for any such special purpose, pleas e contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. copyright 2013 lapis semiconductor co., ltd.

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